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A small high-speed tunnel-diode memory.

University of British Columbia

The design of a 16 word 25 bit tunnel-diode memory is described. The memory is word organized and employs destructive readout, the current change of state of the tunnel diodes being sensed. This arrangement requires only a resistor and tunnel diode for each bit stored. The driver circuits for the memory serve three functions: 1) to couple into the array the information to be stored, 2) to supply dc biasing to the array and, 3) to sense the current transient on readout. Low impedance circuits are required, and two approaches are examined: the modified White emitter follower and the transformer coupled emitter follower. The former employs negative feedback to decrease its input impedance, while the latter employs a broadband transformer. The design of the modified White circuit necessitates an examination of the properties of transistors in the 100 Megacycle frequency range. The characteristics of a few high frequency transistors are shown. The transformer coupled circuit depends on the properties of the broadband transformer. These transformers are examined and a design technique for various current ratios is given. Two sets of experimental results are described using 2X2 arrays to simulate the 16X25 memory. One employs 5 ma tunnel diodes, and the other 1 ma tunnel diodes. Using the 1 ma array with transformer input, successful operation with write pulses 10 nanoseconds wide is demonstrated.

Text

2011-10-06

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http://hdl.handle.net/2429/37813

Electrical and Computer Engineering

University of British Columbia

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