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A predictive analog dead-time control circuit for a high efficiency synchronous buck converter

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Title: A predictive analog dead-time control circuit for a high efficiency synchronous buck converter
Author: Mei, Luyan
Degree Master of Applied Science - MASc
Program Electrical and Computer Engineering
Copyright Date: 2012
Publicly Available in cIRcle 2012-05-09
Abstract: The synchronous buck DC-DC power converter is the most common switching converter circuit used to step down a DC input voltage to a low logic level DC output voltage in computer applications. The synchronous buck converter has two power MOSFET switches that turn on in a complementary fashion. However, to avoid high input current spikes, a short duration of dead-time (i.e. a time interval when neither switch is on) is required. During dead-time intervals, the buck converter synchronous MOSFET internal body diode conducts the high inductor current, leading to high losses. To minimize this loss, a dead-time controller circuit is required to minimize the dead-time. The majority of existing predictive dead-time controllers are digital. These dead-time controllers have problems caused by their discrete output including dithering in steady state and reduced accuracy. Furthermore, existing dead-time controllers are limited to buck converter switching frequencies of 300kHz. Therefore, for operation at switching frequencies above 300kHz, dead-time controllers need to be faster and should operate without dithering. A one-step predictive dead-time control circuit for the synchronous buck converter is proposed in this thesis. It consists of a novel dead-time detection circuit and an analog optimization circuit. The detection circuit utilizes an integrated dead-time detection diode, which can be manufactured on the same die as the synchronous MOSFET in the buck converter. This results in an accurate detection signal indicating body diode conduction of the synchronous MOSFET. The dead-time optimization circuit is an analog circuit, which eliminates the shortcomings of digital control. The proposed circuit is verified using PSIM simulation software. In comparison to the adaptive dead-time control using a TPS2832 MOSFET gate driver with minimal of 15ns dead-time, the proposed dead-time control circuit reduces the body diode conduction time of the synchronous MOSFET to 2ns at 10A half load, 12V input, 1.2V output and 500kHz switching frequency. As a result, the efficiency of the buck converter is increased from 89.2% to 90.8%.
URI: http://hdl.handle.net/2429/42314
Scholarly Level: Graduate

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