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UBC Theses and Dissertations

Accelerating an iterative Helmholtz solver using reconfigurable hardware Petrenko, Artyom

Abstract

An implementation of seismic wave simulation on a platform consisting of a conventional host processor and a reconfigurable hardware accelerator is presented. This research is important in the field of exploration for oil and gas resources, where a 3D model of the subsurface of the Earth is frequently required. By comparing seismic data collected in a real-world survey with synthetic data generated by simulated waves, it is possible to deduce such a model. However this requires many time-consuming simulations with different Earth models to find the one that best fits the measured data. Speeding up the wave simulations would allow more models to be tried, yielding a more accurate estimate of the subsurface. The reconfigurable hardware accelerator employed in this work is a field programmable gate array (FPGA). FPGAs are computer chips that consist of electronic building blocks that the user can configure and reconfigure to represent their algorithm in hardware. Whereas a traditional processor can be viewed as a pipeline for processing instructions, an FPGA is a pipeline for processing data. The chief advantage of the FPGA is that all the instructions in the algorithm are already hardwired onto the chip. This means that execution time depends only on the amount of data to be processed, and not on the complexity of the algorithm. The main contribution is an implementation of the well-known Kaczmarz row projection algorithm on the FPGA, using techniques of dataflow programming. This kernel is used as the preconditioning step of CGMN, a modified version of the conjugate gradients method that is used to solve the time-harmonic acoustic isotropic constant density wave equation. Using one FPGA-based accelerator, the current implementation allows seismic wave simulations to be performed over twice as fast, compared to running on one Intel Xeon E5-2670 core. I also discuss the effect of modifications of the algorithm necessitated by the hardware on the convergence properties of CGMN. Finally, a specific plan for future work is set-out in order to fully exploit the accelerator platform, and the work is set in its larger context.

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Rights

Attribution-NonCommercial 2.5 Canada