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Design and evaluation of a high performance multi-priority multicast ATM switch

University of British Columbia

Asynchronous Transfer Mode (ATM) is believed to be the standard protocol for the extremely demanding high speed networking field. The switching technologies employed in A TM cell switches are extensively researched and studied in recent years. However, most developed switches nowadays are lack of either performance or costefficiency. Furthermore, most switching researches published are based on uniform incoming cell traffic pattern, which is very different from real time traffics. Real time traffics are not only bursty, they are also involved with multiple classes of prioritized traffics, as well as multicast traffic. In this thesis, a high performance and cost-effective A TM switch architecture is introduced. The switching architecture is based on two existing technologies, namely Skew Round Robin scheduling and Virtual Output Queuing schemes. These two schemes are proved to be simple and high performers under uniform traffic pattern [16]. Simulation results show that with a little modification made to these schemes, a switch can perform extremely well under many kinds of real time traffic patterns, including multi-priority and multicast. In addition, with the proposed switching architecture, it's shown that cell loss ratio can be arbitrarily reduced — with finite buffer size and bounded delay - even under bursty traffic pattern.

Thesis/Dissertation

application/pdf

2009-06-25

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http://hdl.handle.net/2429/9663

Electrical and Computer Engineering

University of British Columbia

UBCV

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